CPU Verification Engineer
Location: Bengaluru, India
Experience: 6–12 Years
Role
Verify next-generation CPU cores and subsystems by driving end-to-end functional verification from architecture to signoff. Build scalable verification infrastructure and enable first-pass silicon success.
What You'll Do
Own verification of CPU Core, Cache, MMU, Interrupt, Debug, and Interconnect subsystems.
Develop scalable SystemVerilog/UVM verification environments, VIPs, scoreboards, assertions (SVA), checkers, and coverage models.
Drive verification planning, constrained-random testing, regression, functional coverage, debug, and signoff.
Verify ARM/RISC-V CPU architectures, cache coherency, memory ordering, exception handling, privilege modes, and performance features.
Collaborate with Architecture, RTL, Performance, DFT, Emulation, Firmware, and Post-Silicon teams to resolve complex design issues.
Drive verification methodology, automation, and reusable verification infrastructure.
What You Bring




6–12 years of hands-on CPU/SoC Design Verification experience.
Solid expertise in SystemVerilog, UVM, Testbench Architecture, SVA, Functional Coverage, and Constrained Random Verification.
Robust understanding of ARM or RISC-V architecture, CPU pipelines, cache hierarchy, MMU, coherency protocols, interrupts, and debug architecture.
Experience with AXI/ACE/CHI, cache coherency, memory subsystem verification, and SoC integration.
Proficiency with VCS/Xcelium/Questa, Verdi/DVE, and scripting using Python, Tcl, or Perl.
Preferred
Experience with Emulation (ZeBu/Palladium/Veloce), Formal Verification, CDC/RDC, and Low-Power (UPF) verification.
Exposure to performance verification and architectural validation is a plus.
We're Looking For
Engineers who can architect robust CPU verification settings, solve complex microarchitectural verification challenges, and deliver high-quality silicon for next-generation compute platforms.

📌 Cpu Verification Engineer Bengaluru
🏢 leadsoc technologies
📍 Bengaluru