Senior Verification Engineer (Vasanthanagar)

Senior Verification Engineer (Vasanthanagar)

12 Aug
|
ACL Digital
|
Vasanthanagar

12 Aug

ACL Digital

Vasanthanagar

Job DescriptionIP/ SoC Verification Engineer
nJob Description:
n
- n
- Must have good knowledge on the verification flows.n
- Excellent hands-on debug skills and problem solving attitude..n
- Experience of working in complex test-bench/model in Verilog, System Verilog or SystemCn
- Experience of working on Functional Verification, SoC Verification, Emulation.n
- Good in programming : System Verilog, PLI/DPI interface, C/C++, PERL/Shell script, assembly language.n
- OVM/UVM Methodology knowledge and experience.n
- Must have valuable communication skills and the ability to work in a team environment.n
- Preferably having experience in architecture such as x86 or ARM domain based SOCsn

nhaving SOC/IP performance verification background is added plus.
nExperience: 4 to 12 Years
nLocation: Bangalore

📌 Senior Verification Engineer (Vasanthanagar)
🏢 ACL Digital
📍 Vasanthanagar

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