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Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

DRAM ASIC Architecture

Role Overview
Micron is seeking an experienced architect to drive the definition of next-generation DRAM products incorporating advanced CMOS-based logic die technologies.
This role will help define how future DRAM products leverage advanced CMOS logic die technologies to enable higher levels of integration, observability, reliability, power efficiency, security, and system differentiation beyond what is achievable in conventional DRAM-only implementations. The architect will define architectures that leverage advanced logic die capabilities to complement and enhance DRAM functionality across LPDDR, DDR, HBM and future heterogeneous memory solutions.
The successful candidate will architect I/O, reliability, manageability, interface,



test and system-enhancement functions. The role requires robust collaboration across DRAM design, ASIC architecture, packaging, process technology, product engineering, validation, firmware, and system architecture teams.

Key Responsibilities
- Define next-generation DRAM + logic-die architectures, including functional partitioning between DRAM arrays, peripheral circuitry, and advanced CMOS logic die platforms – to optimize performance, power, cost, reliability, and product differentiation.
- Identify and evaluate system, interface, reliability, test, management, and control functions that may benefit from advanced logic-die implementations; perform architectural tradeoff analysis covering area, power, latency, yield, testability, reliability, and product scalability.
- Define scalable CMOS logic-die architectures and subsystem solutions using a combination of custom, semi-custom, and standard IP solutions.
- Archi

📌 MTS DRAM ASIC Architect (Bengaluru)
🏢 Micron
📍 Bengaluru