Principal Verification engineer (Bengaluru)

Principal Verification engineer (Bengaluru)

12 Aug
|
Onsemi
|
Bengaluru

12 Aug

Onsemi

Bengaluru

Description
We are seeking an experienced Principal ASIC/SoC Verification Engineer to join our dynamic and fast‑paced engineering team. In this role, you will be responsible for ensuring the functional correctness, robustness, and overall quality of our cutting‑edge semiconductor and SoC designs. If you thrive in a collaborative environment and enjoy solving complex technical challenges, this opportunity is an excellent fit.

Responsibilities

1. Verification Planning and Execution
- Develop and execute comprehensive SoC/IP‑level verification plans aligned with design specifications and project goals.
- Drive verification closure through functional, code, and assertion coverage, ensuring high‑quality deliverables.
- Apply industry‑standard ASIC/SoC verification techniques including test planning, testbench creation, constrained‑random and directed stimulus, assertions, and coverage‑driven verification.
- Perform SoC integration verification, validating interactions across subsystems, interfaces, and power/performance domains.

2. Testbench & Setting Development
- Architect,



develop, and enhance SystemVerilog UVM/OVM‑based testbenches for IP and SoC‑level verification.
- Build and integrate reusable Verification IP (VIP) and scalable verification components.
- Collaborate with internal teams and third‑party VIP providers to ensure seamless integration and compliance.
- Develop checkers, scoreboards, monitors, and coverage models to support robust verification.

3. Methodology, Flows & Best Practices
- Demonstrate strong understanding of ASIC/SoC design and verification methodologies, including constraint‑random verification and object‑oriented programming principles.
- Contribute to verification methodology improvements, automation, and flow optimization.
- Ensure adherence to best practices in UVM architecture, reuse, and maintainability.

4. Advanced Verification Skills
- Perform Gate‑Level Simulation (GLS) including SDF annotation, timing verification, and deb

📌 Principal Verification engineer (Bengaluru)
🏢 Onsemi
📍 Bengaluru

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