12 Aug
|
HCLTech
|
Dharwad
Job Role
Are you passionate about digital design and cutting-edge semiconductor technology? We are looking for a highly skilled RTL Design Engineer to join our growing ASIC/SoC team. This is an opportunity to work on next-generation silicon products, solve complex design challenges, and collaborate with some of the industry's best engineering minds.
What You'll Do
Design and develop high-quality RTL using Verilog/SystemVerilog or VHDL .
Convert architecture and functional specifications into efficient, scalable designs.
Drive RTL integration, functional validation, and design optimization.
Perform timing analysis and support timing closure activities using SDC and STA methodologies .
Collaborate with Verification, Physical Design, DFT, and Architecture teams to ensure successful project execution.
Participate in design reviews and contribute to best-in-class design practices.
What We're Looking For
5-15 years of hands-on experience in ASIC/SoC RTL Design .
Strong expertise in Verilog/SystemVerilog or VHDL .
In-depth knowledge of digital design concepts, FSMs, CDC, synthesis, and timing analysis.
Experience with SDC constraints, STA, and timing closure .
Strong debugging, analytical, and problem-solving skills.
Excellent communication and collaboration abilities.
Preferred Skills
Experience with UVM-based verification environments .
Knowledge of Python, Perl, or Shell scripting .
Exposure to protocols such as PCIe, DDR, Ethernet, USB, AXI, AHB, or APB .
Why Join Us?
✅ Work on advanced ASIC and SoC products that impact millions of users worldwide.
✅ Collaborate with top semiconductor experts in a highly innovative workplace.
✅ Gain exposure to complex, high-performance chip development projects.
✅ Accelerate your career with continuous learning and growth opportunities.
✅ Competitive compensation and comprehensive benefits.
📌 RTL Design Engineer (Dharwad)
🏢 HCLTech
📍 Dharwad