Company Qualcomm India Private Limited Job Area Engineering Group Engineering Group Hardware Engineering General Summary Responsibilities will include To be strong designer who is able to work independent on one of the peripheral IP s come up with design and microarchitecture solutions guide mentor juniors engage with external teams to drive resolve cross team dependencies Take complete responsibility of one or more project and drive that independently Being able to make schedule estimates is a plus People management experience is a plus Skills Requirements needed 8 to 10 years of work experience in ASIC IP cores design Required Bachelor s Electrical Engineering Preferred Master s Electrical Engineering Knowledge of AMBA protocols - AXI AHB APB SoC clocking reset debug architecture and peripherals like USB PCIE Ethernet preferred Work closely with the SoC verification and validation teams for pre post Silicon debug Hands on experience in Low power design is required Hands on experience in Multi Clock designs Asynchronous interface is a must Experience in using the tools in ASIC development such as Lint CDC Design compiler and Primetime is required Understanding of constraint development and timing closure is a plus Experience in Synthesis Understanding of timing concepts is a plus Strong experience in micro architecting RTL design from high level design specification Excellent problem solving skills solid communication and team work skills are mandatory Self-driven needs to work with minimum supervision Experience in System Verilog Verilog C C Perl and Python is a plus Ability to lead a small design team Minimum Qualifications o Bachelor s degree in Computer Science Electrical Electronics Engineering Engineering or related field and 4 years of Hardware Engineering or related work experience OR Master s degree in Computer Science Electrical Electronics Engineering Engineering or related field and 3 years of Hardware Engineering or related work experience OR PhD in C