This role is for one of the Weekday's clients
Min Experience: 6+ years
Location: India
JobType: full-time
We are seeking an experienced
Physical Design Engineer
to drive the complete RTL-to-GDSII implementation flow for complex ASIC/SoC designs. The ideal candidate should have strong expertise in block- or chip-level physical design, timing closure, power optimization, and signoff using industry-standard EDA tools on advanced technology nodes.
Requirements
Key Responsibilities
- Execute the complete Physical Design flow from Netlist to GDSII
- Perform Floorplanning, Power Planning, Placement, CTS, Routing, and Physical Verification
- Drive timing closure while meeting PPA (Performance, Power, and Area) targets
- Perform congestion analysis and optimize placement and routing
- Analyze and fix setup/hold timing violations across all design corners and modes
- Perform physical signoff including DRC, LVS, IR Drop, EM, and antenna checks
- Collaborate with RTL, DFT, STA, and Packaging teams to achieve successful tape-out
- Debug and resolve implementation issues while ensuring design quality
- Support ECO implementation and timing closure activities
- Ensure successful tape-out on advanced technology nodes
Mandatory Skills (Deal-Breakers)
Candidates
must
have the following skills:
- 6+ years of hands-on experience in ASIC/SoC Physical Design
- Solid experience in complete RTL-to-GDSII implementation flow
- Expertise in:
- Floorplanning
- Power Planning
- Placement & Optimization
- Clock Tree Synthesis (CTS)
- Routing
- Physical Verification
- ECO Implementation
- Strong timing closure experience with setup and hold optimization
- Hands-on experience with Cadence Innovus
- Experience using Synopsys ICC2 is an added advantage
- Strong knowledge of Static Timing Analysis (STA) concepts
- Experience with IR Drop, EM Analysis, Crosstalk, Noise, and Signal Integrity
- Hands-on experience with Calibre for DRC/LVS signoff
- Experience with advanced technology nodes such as
📌 Physical Design (India)
🏢 Weekday AI (YC W21)
📍 India
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