Job Overview

The Arm Solutions Engineering organization develops complex silicon solutions, taking projects from system specification through front-end design and validation to physical implementation and silicon demonstrators.

Join our energetic High-Speed I/O Technology Team (HSIO-TT) within Arm Solutions Engineering

We are a team of engineers focused on developing PCIe subsystem solutions for infrastructure SoCs. Demonstrating the latest Arm IPs alongside carefully selected third-party IPs, we deliver highly integrated, optimized subsystem designs that meet the performance and scalability demands of next-generation infrastructure platforms.

Responsibilities

As a member of the Front-End Design team, you will contribute to the development of tape-out-ready PCIe subsystems for next-generation infrastructure SoCs. You will be responsible for planning your work, tracking progress, and reporting status to ensure the timely delivery of high-quality designs.

Your key responsibilities will include developing micro-architectures from high-level specifications, RTL design,



coding and integrating a range of IPs, including Analog/mixed-signal IPs, PHYs, PLLs, Sensors and other subsystem components. You will perform comprehensive design quality checks, including Lint, CDC, RDC and other sign-off activities.

You will also collaborate closely with the verification team to review test plans, debug design issues, and ensure thorough functional coverage. In addition, you will work with the implementation team to review timing constraints and exceptions, define design partitions, and support engineering change orders (ECOs) through to tape-out.

Required Skills And Experience

Hands-on working knowledge of SystemVerilog or Verilog HDL for RTL design
Solid understanding of RTL design techniques for complex SoC development
Familiarity with industry-standard EDA tools and methodologies
Experience in the following areas: static design checks, power and clock domain crossing, synthe

📌 Design Engineer (Noida)
🏢 ARM
📍 Noida