Lead Design Engineer (Pune Division)

Lead Design Engineer (Pune Division)

13 Aug
|
Cadence
|
Pune Division

13 Aug

Cadence

Pune Division

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
3++ Year ASIC Design / Verification experience. Required Expertise in PCIe / Storage (ONFI, XSPI, SD/eMMC) Design and Verification domain. Good debug skills and valuable communication skills.

We’re doing work that matters. Help us solve what others can’t.

📌 Lead Design Engineer (Pune Division)
🏢 Cadence
📍 Pune Division

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