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Role Summary

We are looking for aStaff Engineer with strong virtualization and hypervisor fundamentals to drive post‑silicon validation of CPU cores. The engineer will leverage virtualized workloads and customer‑representative scenarios to stress core microarchitecture, identify silicon issues early, and collaborate with design, uCode/FW, BIOS,



and platform teams to root‑cause and resolve issues.

This role treats virtualization as a primary validation and bug‑hunting vector, rather than a feature enablement check, to uncover real‑world core issues under production‑like stress.

Key Responsibilities
- Execute post‑silicon cores validation using virtualization‑based workloads and scenarios
- Configure, deploy, and debug workloads on hypervisors (KVM, VMware, Hyper‑V, Xen) across Linux and Windows environments
- Design and run VM‑based stress tests (migration, pause/resume, overcommit, multi‑VM contention, long‑run soak, reset scenarios) to expose core‑level bugs
- Analyze system failures and triage issues spanning core microarchitecture, uCode, FW, BIOS, DF/UMC, and platform interactions
- Correlate failures using logs, MCA, MSRs, debug hooks, and limited post‑silicon observability
- Work closely with design and architecture teams to provide action

📌 CPU/Cores Post‑Silicon Validation (Bengaluru)
🏢 AMD
📍 Bengaluru