Job Area:
Engineering Group, Engineering Group > Software Engineering
General Summary:
*General Summary:*
*We are looking for a highly skilled and experienced Staff Engineer for the design and development of performance monitoring and debug features in our next-generation Qualcomm SoCs. This role is ideal for a hands-on technical leader who thrives at the intersection of hardware and software and is passionate about RISC-V architecture.*
*You will play a critical role in defining the architecture, enabling current hardware features, and ensuring compliance with industry standards such as RISC-V debug, RISC-V Supervisor Binary Interface (SBI), RISC-V control transfer records, and other related RISC-V specifications.*
*Key Responsibilities*
- Contribute to architecture and software development of debug and performance monitoring features for RISC-V.
- Drive upstream contributions to the OpenSBI and Linux kernel, ensuring long-term maintainability and community alignment.
- Collaborate with hardware engineers to enable software stack on silicon and emulation platforms, debug hardware-software interactions, and ensure seamless integration.
- Guide the integration of compliance test suites for RISC-V specifications.
Minimum Qualifications:
- Bachelor’s degree in engineering, Information Systems, Computer Science, or related field and 4+ years of Software Engineering or related work experience.
OR
Master’s degree in engineering, Information Systems, Computer Science, or related field and 3+ years of Software Engineering or related work experience.
OR
PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related work experience.
- 2+ years of work experience with Programming Language such as C, C++, Java, Python, etc.
*Required Qualifications*
- 10+ years of experience in low-level system programming.
- Good understanding in performance monitoring and hardware