Senior IC Substrate Package Layout Designer (Bengaluru)

Senior IC Substrate Package Layout Designer (Bengaluru)

13 Aug
|
MaxLinear
|
Bengaluru

13 Aug

MaxLinear

Bengaluru

Responsibilities

We are looking for an experienced Senior IC Substrate Package Layout Designer to lead advanced semiconductor package development from die netlist analysis, bump feasibility and package planning through substrate layout, SI/PI optimization, and manufacturing release. The role requires close collaboration with Backend/Physical Design, SI/PI, Assembly, Reliability, and Manufacturing teams to deliver high-performance package solutions for complex SoCs and multi-die products. You will focus on:
- Own complete package design activities including die bump planning, pin assignment, floorplanning, package routing, stackup definition, and package signoff
- Perform bump feasibility studies and optimize package architecture for routability, SI/PI performance, manufacturability, reliability, and cost
- Design and implement substrates for FCCSP, HFCBGA/FCBGA, Leadframe, Multi-Chip Modules (MCM), SiP, Interposer, Chiplet-based and advanced 2.5D/3D packages
- Collaborate closely with Backend, SI/PI, Thermal, Assembly, OSAT,



and substrate vendors to resolve design and manufacturing challenges
- Support package verification, design reviews, and tape-out activities while ensuring compliance with technology and assembly requirements

Qualifications
- Bachelor's or Master's degree in Electrical/Electronics Engineering or related field
- 4+ years of experience in IC package/substrate layout design
- Expert-level proficiency in Cadence Allegro Package Designer (APD/APD XL), SiP Layout, and Constraint Manager
- Robust understanding of substrate stackups, material selection, HDI technologies, via structures, package assembly processes, and reliability considerations
- Working knowledge of Signal Integrity, Power Integrity, impedance control, differential routing, PDN design, return path optimization, and crosstalk management
- Hands-on experience with high-speed interfaces including SerDes, PAM4, PCIe, DDR/LPDDR, HBM, Ethernet, CXL, USB, UCIe, and other multi-gigabit inter

📌 Senior IC Substrate Package Layout Designer (Bengaluru)
🏢 MaxLinear
📍 Bengaluru

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