Location: Greater Bengaluru Area (Hybrid)/ Greater Hyderabad
we are redefining the economics of AI infrastructure. Our mission is to democratise AI by significantly reducing the Total Cost of Ownership (TCO) of hardware systems — a critical barrier to scalable adoption.
Our proprietary MIMO-over-copper technology powers a high-performance, chiplet-based AI memory fabric that is both scalable and energy-efficient. Unlike traditional interconnects, our solution reduces power consumption significantly while preserving high bandwidth and ultra-low latency — unlocking unprecedented efficiency for AI training and inference at scale.
our architecture is not just an incremental improvement — it’s a foundational shift in how AI hardware is built for the future.
. Location: Hyderabad/Bangalore
We are actively seeking
Physical Design Engineers based in Hyderabad OR Bangalore
Required competences - Experience
- 15-25 years’ experience in the semiconductor industry, with min. 5 years in a digital Physical Design technical leadership role
- Experience on up-to-date semiconductor process technologies including 28nm, 14/16nm, 7nm
- Experienced user of EDA tools for design and verification such as, Cadence Genus and Innovus, LEC, Calibre/PVS DRC/LVS, parasitics extraction, EM and IR drop, ESD, etc.
- Expertise in Timing Constraints and Static Timing Analysis (STA)
- Experience in CPF/UPF technologies and flows is highly desirable
- Exposure to flip-chip package technologies and wire bond package technologies
- Experience in hierarchical floor planning and implementation
- Experience in release management and tape out procedures
- Experience in library setup and flow development with focus on cross project reusability
- Experience in DFT methodologies and implementation schemes
Required
Competencies – Skills
Required competences - Skills
- Good understanding of RTL to GDS implementation flow (synthesis, P&R;, LEC, PV)
- Self-motivated, w