This role is for one of the Weekday's clients
Min Experience: 4+ years
Location: Bengaluru, Karnataka, India
JobType: full-time
We are seeking a skilled
Physical Verification Engineer
to join our VLSI design team. In this role, you will be responsible for executing physical verification and signoff activities for complex semiconductor designs, ensuring layouts meet foundry requirements and are ready for successful tape-out. You will collaborate closely with Physical Design, Layout, and Design teams to identify and resolve verification issues while maintaining high-quality design standards.
Requirements
Mandatory Skills
- 4-8 years of experience in Physical Verification (PV)
- Strong hands-on experience with Calibre, Fusion Compiler (FC), and Innovus
- Good understanding of Physical Verification methodologies and signoff flows
- Experience in DRC, LVS, ERC, and layout verification
- Strong scripting skills using TCL, Perl, or Shell
- Excellent debugging and problem-solving skills
- Valuable communication and collaboration skills