Required Technical Skill Set
- FPGA Design Experience with one or more High Speed IO Protocols (PCIe, Ethernet, CXL, DDR, etc.)
- Proficiency with Verilog and/or System Verilog
- 5+ years of RTL Design experience for FPGA or ASIC
- Experience with FPGA Debug in Simulation and HW Bring up
- Experience with scripting languages (Python, Perl, TCL, Bash, etc.)
- Knowledge of using and debugging in a UVM environment
- Experience with one or more of the following protocols: SPI, I2C, AXI, QSPI, USB, etc.
- Experience working with embedded firmware and or device driver development
- Solid Communication and problem solving skills
- Must be a self-starter, and able to independently drive tasks to completion