IP Physicial design engineer (Bengaluru)

IP Physicial design engineer (Bengaluru)

13 Aug
|
Qualcomm
|
Bengaluru

13 Aug

Qualcomm

Bengaluru

Company:
Qualcomm India Private Limited
Job Area:
Engineering Group, Engineering Group > Hardware Engineering
General Summary:
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.
Minimum Qualifications:
• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering,



or related field and 3+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
Job Description
6 to 10 years of relevant experience in Physical Design
Extensive hands-on experience in the Physical Design flow, including floorplanning, power planning, placement, clock tree synthesis (CTS), routing, and physical verification.
Robust expertise in timing closure using PrimeTime and/or Tempus, with a thorough understanding of setup/hold analysis, OCV/POCV methodologies, clocking architectures, and STA signoff.
Proven experience working on advanced technology nodes and delivering IP-level Physical Design solutions, including end-to-end ownership from netlist to GDS.
Demonstrated ability to analyze, debug, and resolve timing, congestion, DRC/LVS, EM/IR, and integration-related challenges.
Fami

📌 IP Physicial design engineer (Bengaluru)
🏢 Qualcomm
📍 Bengaluru

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