13 Aug
|
Lattice Semiconductor (india)
|
Pune
13 Aug
Lattice Semiconductor (india)
Pune
As a Senior Manager in Silicon Design Validation, You lead a highly motivated team focused on ensuring the quality and performance of advanced semiconductor products. Your role provides strategic oversight and technical direction across the full post-silicon lifecycle, from first silicon arrival to production release.
Key Leadership Areas:
- Technology Enablement Learning Culture Fostering a learning setting where engineers gain hands-on experience with FPGA architectures and foundational IP blocks such as SERDES (PMA/PCS), DDR memory (DDR4, LPDDR4, DDR5), DPHY, PLLs, DSPs, MIPI, Fabric, and I/O subsystems.
- Validation/Characterization Strategy Execution Overseeing the validation and characterization of analog, digital, and mixed-signal IPs, ensuring robust coverage from initial silicon bring-up through production qualification.
- Planning Infrastructure Development Guiding the development of validation plans, including bench hardware and software requirements, and ensure the team has the necessary tools and infrastructure to execute effectively.
- RTL Development for Test Enablement Supervising the creation of custom RTL test logic to support targeted validation and characterization efforts, enabling deeper insight into IP behavior.
- Silicon Bring-Up Debug Leadership Driving the bring-up of new silicon products, driving validation and debug activities to assess IP functionality and performance. This includes characterizing datasheet parameters, performing statistical analysis of measured data, and overseeing datasheet preparation.
- Cross-Functional Collaboration Acting as the central liaison between design, verification, manufacturing, test, quality, and marketing/application teams, ensuring alignment and smooth transition from silicon arrival to product release.
- Customer Support Issue Resolution Providing leadership in resolving post-release customer issues, coordinating with internal teams to ensure timely and effective solutions.
You Have
- 15+ years
📌 Silicon Design Validation, Senior Manager (Pune)
🏢 Lattice Semiconductor (india)
📍 Pune