MSIP PLL Design Verification Engineer, Sr Lead (Bengaluru)

MSIP PLL Design Verification Engineer, Sr Lead (Bengaluru)

13 Aug
|
Qualcomm
|
Bengaluru

13 Aug

Qualcomm

Bengaluru

Company:
Qualcomm India Private Limited
Job Area:
Engineering Group, Engineering Group > Hardware Engineering
General Summary:
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.
Minimum Qualifications:
• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering,



or related field and 2+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
Join Qualcomm's design verification team in verifying the high-speed mixed-signal IP designs (PLL, DAC, ADC, Sensors, PCIe, USB, MIPI, CXL, C2C, D2D, DDR, etc.) for exciting products targeted for 5G, AI/ML, compute, IOT, and automotive applications. The team is responsible for the complete design verification lifecycle, from system-level concept to tape out and post-silicon support.
Responsibilities:
Define pre-silicon and post-silicon testplans based on design specs and using applicable standards working closely with design team.
Architect and develop the testbench using advanced verification methodology such as SystemVerilog/UVM, Functional Verification, UPF / Low power verification, Formal verification and

📌 MSIP PLL Design Verification Engineer, Sr Lead (Bengaluru)
🏢 Qualcomm
📍 Bengaluru

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