Job Details:
Job Description:

Intel is seeking a senior software engineer for the Silicon Chassis team. In this technical hands-on leadership role, you will help define end-to-end automation strategy and lead development of the chassis automation tool. Chassis refers to non-compute infrastructure in any soc, which provide essential platform services and typically include interconnects, protocol bridges, clock/reset/power, security, debug/trace/analytics (DTA), RAS error logic, address maps, firmware tables etc. The chassis automation tool will collect user requirements, and translate these requirements into chassis parameters, topology and generate RTL, register definitions, integration and verification collateral for the chassis using highly parameterized and configurable sub-components.

You will work directly with chassis architecture, RTL design, verification, and SOC integration teams to encode the architectural rules of the interconnect and develop a reliable, testable automation framework. You will also mentor the junior engineer joining alongside you.



AI-assisted workflows are part of everyday development here. Consistent execution against schedule and quality goals is expected.

Why This Role Is Exciting

Build a brand current automation platform by defining the tool, schema, and methodology from the ground up
Directly influence next-generation SoC chassis architectures and delivery
Collaborate across architecture, RTL, DV, and SoC integration teams
Drive technical direction and establish best practices with broad organizational impact

Key Responsibilities
Architect, design, and implement a new chassis automation tool to meet requirements across multiple SoC programs, ensuring scalability, maintainability, and extensibility.
Analyze chassis and interconnect architecture specifications, along with high-level SoC requirements, and build tooling and infrastructure to translate these requirements into generated outputs such as RTL, RDL, verification collateral, t

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