We are designing indigenous, massive MIMO radar systems on the mm-wave spectrum, geared toward cutting-edge security screening and indoor imaging applications. We operate at the intersection of complex RF hardware, high-speed digital design, and fundamental signal processing.
Role Overview
We are seeking a highly skilled Digital Design Engineer to architect and implement the high-speed data pipelines, control planes, and deterministic timing logic that form the backbone of our radar systems. You will bridge the gap between custom hardware and embedded software, handling unprecedented data avalanches and driving critical component selection.
Key Responsibilities
- High-Speed Data Ingestion: Architect and program FPGA pipelines to ingest, preprocess, and route massive data streams (>10 Gbps). Manage high-speed data reception through MIPI CSI-2 interfaces and ensure reliable transmission to downstream compute nodes.
- Architecture HW/SW Partitioning:
Drive the system-level architecture by determining the optimal hardware-software partitioning for processing, storing, and routing data across large form-factor systems.
- Component Selection: Evaluate and select appropriate FPGAs and System-on-Chips (SoCs), rigorously analyzing cost, power, and performance tradeoffs for production-scale deployment.
- Embedded Systems Control Planes: Program ARM processors and microcontrollers to work in tandem with the FPGA. Design and implement robust data and control planes across the board.
- Radar Timing Sequencing: Develop strictly deterministic logic utilizing both FPGAs and microcontrollers to manage the complex Tx-Rx sequencing and synchronization for our MIMO radar arrays.
Required Qualifications Expertise
- Education: B.Tech or M.Tech in Electronics Communication, Electrical Engineering, Computer Engineering, or a related field. RTL FPGA Development:
- Dee
📌 Digital Design (Bengaluru)
🏢 Kritikal Securescan
📍 Bengaluru
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