This role is for one of our clients
Industry: Semiconductors
Company Name: LeadIC Design
Seniority level: Mid-Senior level
Min Experience: 10+ years
Location: Bengaluru
JobType: full-time
We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses and identifying potential inconsistencies or verification signals in application materials based on available information. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.
About The Role
We're looking for a seasoned RTL Design Tech Lead to drive micro-architecture, RTL development, and technical execution for complex ASIC/SoC programs. This role combines deep hands-on design expertise with technical leadership, guiding teams from architecture through tapeout.
The ideal candidate has strong ownership mindset, has led successful silicon bring-ups,
and can operate effectively in both structured and fast-paced environments. This candidate must be willing to be an individual contributor, while leading others. This is an in office role and will require presence in the office 5 days a week. No hybrid option is available.
What You'll Do
Own end-to-end RTL design for major subsystems or full-chip blocks
Define micro-architecture aligned with PPA (Power, Performance, Area) targets
Lead and mentor a team of RTL engineers (junior to senior ICs)
Drive design reviews, coding standards, and best practices
Collaborate closely with:
Design Verification (DV)
Physical Design (PD)
STA / Timing / DFT teams
Ensure high RTL quality via:
Lint, CDC, RDC checks
Low-power (UPF) compliance
Debug complex issues across:
RTL simulation
Gate-Level Simulation (GLS)
Silicon bring-up
Work with foundry and backend constraints (timing, congestion, IR, etc.)