Our vision is to transform how the world uses information to enrich life for
all.
Micron Technology is a world leader in innovating memory and storage solutions
that accelerate the transformation of information into intelligence, inspiring
the world to learn, communicate and advance faster than ever.
For more than 45 years, Micron Technology, Inc. has redefined innovation with
the world’s most advanced memory and semiconductor technologies. We’re an
international team of visionaries and scientists, developing groundbreaking
technologies that are transforming how the world uses information to enrich
life.
We are looking for Layout Design engineer at our Micron Technology’s HBM Team in
Hyderabad, India. As a Layout Design engineer, you will be working for intensive
applications such as artificial intelligence and high performance computing
solution, High Bandwidth Memory. As a Layout Design Engineer you will be
collaborating with peer teams crossing Micron global footprint, in a multiple
projects-based setting.
Role and Responsibilities
* RESPONSIBLE FOR DESIGN AND DEVELOPMENT OF CRITICAL DESIGN AND CO-OPTIMIZATION
OBJECTIVES, MIXED-SIGNAL, CUSTOM DIGITAL BLOCK AND FULL CHIP LEVEL
INTEGRATION SUPPORT.
* BUILD AND TAPEOUT PWF RETICLES DESIGN
* ENGAGE WITH SCRIBE DESIGN TEAM TO CAPTURE ADVANCED PACKAGING REQUIREMENTS AND
REVIEW
* TSV DESIGN ENGAGEMENT WITH HIG-HBM DTPCO TEAMS (ELECTRICAL , THERMAL AND
MECHANICAL PERFORMANCE)
* CREATION AND MAINTENANCE OF DFMEA RELATED TO ADVANCED PACKAGING PROCESS STEPS
LIKE PWF, DIE STACKING ETC
* HIGHLY MOTIVATED WITH PASSION, DETAIL ORIENTED, SYSTEMATIC AND METHODICAL
APPROACH IN IC LAYOUT DESIGN
* PERFORM LAYOUT VERIFICATION LIKE LVS/DRC/ANTENNA, QUALITY CHECK AND
DOCUMENTATION.
* RESPONSIBLE FOR ON-TIME DELIVERY OF BLOCK-LEVEL LAYOUTS WITH ACCEPTABLE
QUALITY.
* DEMONSTRATE LEADERSHIP SKILL IN PLANNING, AREA/TIME ESTIMATION, SCHEDULING,
DELEGATION AND EXECUTION TO MEET PROJECT SCHEDULE/MILESTONES IN MULTIPLE
PROJECT