Design Methodology – Senior (Hyderabad)

Design Methodology – Senior (Hyderabad)

13 Aug
|
Micron
|
Hyderabad

13 Aug

Micron

Hyderabad

Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Key Responsibilities:
- Develop and standardize EMIR methodology that applies consistently across all DRAM products, ensuring alignment, repeatability, and high-quality analysis outcomes
- Perform static and dynamic EM/IR analysis using RedHawk or Totem or other industry‑standard tools; identify root‑cause issues such as high‑resistance segments, insufficient via density, and decap deficiencies, and provide explicit, actionable recommendations to design and layout teams.
- Actively leverage AI‑based tools, agentic workflows, and automation frameworks for effective Power-delivery-network (PDN) analysis.
- Maintain a strong understanding of the full EMIR flow—from netlist preparation, extraction, simulation,



and debug to reporting and silicon correlation—and ensure accurate evaluation across operating modes and temperatures.
- Partner across design, timing, physical implementation, architecture, modeling, and verification teams to understand real switching behavior, develop worst‑case vectors, and standardize analysis expectations across global teams.
- Collaborate with cross-geographical teams and also EDA tool vendors to evaluate and improve EMIR methodologies, and document Best Known Methods (BKMs) to enhance consistency and correlation across DRAM teams.
- Develop and maintain dashboards to track EMIR results, monitor trends, and support signoff progression for multiple designs.

Qualifications:
- Master’s degree in electrical or computer engineering.
- 4 - 8 years of experience in PDN / Power Integrity / EMIR analysis for advanced semiconductor or SoC designs.
- Deep hands‑on experience with Ansys RedHawk or Totem for full‑chip EM/IR verification and PDN analysis, incl

📌 Design Methodology – Senior (Hyderabad)
🏢 Micron
📍 Hyderabad

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