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As a Micron's ASIC DFT team we implement DFT for Micron IPs and Memory controllers(SOC) developed for different type of Storage products in Micron.



We are using the best in class DFT methodologies and process technologies to ensure that we deliver the best quality products to achieve the lowest DPPM numbers.
We work closely with Design(RTL), DV, Physical Implementation team, Test Engineering and Product Engineering team to support early analysis to the Silicon bring-up and Characterization.
Required Skills and Experience :
Bachelor’s or Master’s Degree or equivalent experience in Electronics Engineering, Microelectronics, Software Engineering or a related field. The role of Senior DFT engineer require 5+ years of industry experience with shown ability in DFT of highly sophisticated SOCs :
- Core skills include Scan Codec insertion, Memory BIST and Repair implementation, Logic BIST, ATPG, BSCAN & JTAG (IEEE1149.1 & IEEE1687), Fault Simulation, ATPG Fault models(SAF, TDF, SDD, PDT etc), SDF annotated gate level verification, Scan and Memory Diagnosis.
- Must have experience with Siemens, Synopsys and/or Cadence Cad tools.
- Shall have experience in cod

📌 SR Engineer, ASIC DFT (Hyderabad)
🏢 Micron
📍 Hyderabad