Senior Staff Engineer – Design Verification
Location: Bengaluru, India
Experience: 10–15 Years
About the Role
We're looking for a Senior Staff Design Verification Engineer to lead verification of next-generation CPU and SoC platforms. You'll define verification strategies, architect scalable UVM environments, and drive verification closure for complex CPU and high-performance SoC/IP designs.
What You'll Do
Lead verification of CPU, SoC, and IP designs from planning through signoff.
Architect and develop reusable SystemVerilog/UVM verification environments.
Verify ARM and RISC-V CPU architectures and complex SoC subsystems.
Drive verification of high-speed protocols including PCIe, CXL, AXI/ACE/CHI, DDR, USB, and Ethernet.
Develop assertions (SVA), constrained-random testbenches, functional coverage, and debug complex issues.
Collaborate with Architecture, RTL, Physical Design, and Validation teams to achieve first-pass silicon success.




Mentor engineers and provide technical leadership across verification programs.
What We're Looking For
10–15 years of hands-on Design Verification experience.
Strong expertise in SystemVerilog, UVM, and SVA.
Proven experience in CPU Verification, SoC/IP Verification, and verification methodology development.
Strong hands-on experience with ARM CPU and/or RISC-V architecture verification.
Positive knowledge of high-speed protocols such as PCIe, CXL, AXI/ACE/CHI, DDR, USB, and Ethernet.
Experience with coverage-driven verification, regression management, and industry-standard simulation/debug tools.
Strong scripting skills (Python/Perl/Shell) and excellent debugging and problem-solving abilities.
Join us to architect and verify next-generation CPUs and SoCs powering tomorrow's high-performance computing and AI platforms.

📌 Senior Staff Engineer – Design Verification (Bengaluru)
🏢 Leadsoc Technologies
📍 Bengaluru