Job Area:Engineering Group, Engineering Group > Hardware Engineering
General Summary:
- Job Description - 5+ year RTL designer _
_Key Responsibilities _
- _Develop detailed micro-architecture specifications from high-level architectural requirements. _
- _Design and implement synthesizable RTL using Verilog/SystemVerilog. _
- _Participate in design reviews and ensure design quality and compliance with coding guidelines. _
- _Perform RTL quality checks including: _
- _Lint analysis and cleanup _- _CDC/RDC analysis and closure _
- _FSM and structural checks _
- _Develop and maintain design documentation including micro-architecture and interface specifications. _
- _Work closely with verification teams to define verification plans and resolve functional issues. _
- _Support synthesis, timing analysis, and timing closure activities. _
- _Develop and review SDC constraints for block-level and subsystem-level designs. _
- _Analyze and debug issues across simulation, synthesis, and implementation stages. _
- _Collaborate with DFT and physical design teams for successful integration and tapeout. _
Minimum Qualifications:
- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
OR
Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
OR
PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
_Required Qualifications _
- _Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Engineering, or related field. _
- _5+ years of experience in ASIC/SoC front-end design. _
- _Strong knowledge of digital design fundamentals. _
- _Hands-on expertise in: _
- _RTL design using Verilog/SystemVer
📌 Rtl Design Engineer, Sr Lead (Bengaluru)
🏢 Qualcomm
📍 Bengaluru
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