- Applications for this position will be accepted ONLY ONLINE through:
- BHEL Recruitment Website
- BHEL Careers Page
- No other mode of application will be entertained.
RECRUITMENT OF EXPERIENCED ENGINEERING PROFESSIONALS ON LATERAL
BASIS FOR ELECTRONICS DIVISION (EDN), BANGALORE
Deputy Manager- Embedded FPGA Design Team Lead (LE06)
The prospective candidate should have at least 5 years of post-qualification experience for applying to Senior Engineer (E2) position and exposure in handling the following areas in relevant industry shall be given preference:
Role & responsibilities
Experience for Deputy Manager :- Working experience in:
- Thorough experience of using Intel/ Altera development tool chains
- Experience in RTL design using VHDL/verilog - design complexity 16K
- Understand CDC, STA and other timing considerations in the context of FPGA.
- Advanced knowledge of clocking, memory and other FPGA needs.
- Knowledge of Designing of control cards using Intel FPGA devices
- Understanding Latest Standard Communication Protocols ( CAN,TCP_IP, and or MVB/TRDP )
- Experience of functional testing and test tools
- Interfacing with the Hardware, software, PCB design and System Design Team
Working experience with role & responsibilities of Team Lead and the following
- Design of IP cores/protocols: HDLC/ SPI etc.,
- FPGA Design detailed architecture and interface specification • Experience in using constraints to achieve timing requirement • Experience in building test bench for verification.
- Experience in board level testing and system debugging. • Experience of Reverse engineering
- Basic Porting knowledge of Linux/QNX/VxWorks on SOC
Desirable Skills:
- Candidate should possess inspiring leadership qualities and in-depth of knowledge about the execution and delivery of electronic modules/ sub-assemblies/systems for control & instrumentation or Propulsion equipment of Rail Transportation applications or other relevant applications with insatiable quest for excellence and passion for continuous qualified growth
- Design of IP cores/protocols: Ethernet redundancy /HDLC, SPI etc.,
- Design based on System On Chip(SOC)
- Experience of best practices in software development processes
- Experience of continuous integration, automated test tools and frameworks.
- Exposure of coding standards for defence techniques and standards such as MISRA
- Should have experience in managing conflicting priorities and cross functional teams to successfully implement complex projects.