Job DescriptionSystem-on-Chip (SoC) Design Engineer
nLocation: Bengaluru, India
nExperience: 5–12 Years
nRole:
nDesign and implement high-performance SoC subsystems from microarchitecture to silicon. Collaborate with architecture, verification, DFT, STA, and physical design teams to deliver high-quality, PPA-optimized RTL for next-generation AI, Compute, and Networking SoCs.
nResponsibilities
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Develop microarchitecture and RTL using Verilog/SystemVerilog.n
Design datapaths, pipelines, FSMs, memory interfaces, and control logic.n
Integrate SoC IPs and AMBA-based interconnects (AXI/AHB/APB).n
Optimize designs for Power, Performance, and Area (PPA).n
Drive RTL quality through Lint, CDC/RDC, synthesis, and debug.n




Support timing closure, verification, and silicon bring-up.n

nRequired Skills
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5–12 years of ASIC/SoC RTL Design experience.n
Solid microarchitecture and RTL design expertise.n
Proficiency in Verilog/SystemVerilog and ARM-based SoC architecture.n
Experience with AMBA protocols, high-speed interfaces, and Synopsys Design Compiler.n
Hands-on with Lint, CDC/RDC, VCS/Xcelium/Questa, and Python/Tcl/Perl scripting.n
Exposure to advanced nodes (7nm/5nm/3nm) is a plus.n

📌 System On Chip Design Engineer Vasanthanagar
🏢 leadsoc technologies
📍 Vasanthanagar