Physical Design (PD) Engineer –

We are hiring experienced Physical Design Engineers for ASIC/SoC projects.

Job Responsibilities

- Handle complete Physical Design flow from Netlist to GDSII
- Perform Floorplanning, Placement, CTS, Routing, and Physical Verification
- Work on timing closure, congestion analysis, and power optimization
- Perform STA analysis and fix setup/hold violations
- Handle ECO implementation and signoff activities
- Collaborate with RTL, DFT, and STA teams for design convergence
- Ensure design meets PPA (Power, Performance, Area) targets

Required Skills
- Robust understanding of Physical Design flow
- Hands-on experience in:
- Floorplanning
- Placement & Optimization
- Clock Tree Synthesis (CTS)
- Routing
- STA & Timing Closure
- IR Drop / EM analysis
- Physical Verification (DRC/LVS)
- Experience with EDA tools from:
- Cadence Design Systems (Innovus)
- Synopsys (ICC2, PrimeTime)
- Siemens EDA
- Knowledge of TCL/Perl/Python scripting

Preferred Qualifications
- B.E/B.Tech/M.E/M.Tech in Electronics or related field
- Experience in advanced technology nodes is an added advantage
- Strong debugging and problem-solving skills

Location

- Bangalore / Noida / Hyderabad / Ahmedabad

Experience: 6+ Years

📌 Senior Physical Design Engineer (Bengaluru)
🏢 eInfochips (An Arrow
📍 Bengaluru