Principal Design Verification LeadAbout the RoleLeadIC Design Pvt Ltd is looking for a Principal Design Verification Lead with 10+ years of experience in ASIC/SoC Design Verification to lead DV teams and drive verification architecture for complex SoC/IP programs.

This role combines SoC Verification Architecture, Testbench Architecture, and DV Technical Leadership. The ideal candidate should be hands-on technically and experienced in leading engineers, defining verification strategies, architecting scalable UVM environments, and driving projects to verification closure.

Key Responsibilities

- Lead and mentor a team of Design Verification engineers.
- Define SoC/IP verification strategy, architecture, planning, and sign-off criteria.
- Architect scalable and reusable SystemVerilog/UVM testbenches.
- Drive constrained-random, coverage-driven, assertion-based verification and coverage closure.
- Review testbenches, verification plans, test cases, coverage, and debug results.
- Lead complex verification debug and root-cause analysis.
- Work closely with RTL, architecture, firmware, DFT, and validation teams.
- Drive verification methodology, automation, reuse, quality, and technical best practices.

Required Skills




- 10+ years of ASIC/SoC Design Verification experience.
- Strong hands-on expertise in SystemVerilog and UVM.
- Experience in SoC verification architecture and testbench architecture.
- Strong knowledge of functional coverage, code coverage, SVA, constrained-random verification, regression, and debug.
- Proven experience leading DV teams or complex verification projects.
- Solid understanding of RTL, micro-architecture, and SoC verification.
- Excellent technical leadership, communication, and mentoring skills.

PreferredExperience with AMBA (AXI/ACE/CHI), PCIe, DDR, NoC, cache coherency, low-power verification, formal, emulation, or HW/SW co-verification is a plus. Ideal CandidateDV Lead | SoC Verification Lead | DV Architect | Verification Architect | Testbench Architect | Principal DV Engineer | Staff DV Engineer

Location: Bengaluru | Workplace: Hybrid | Job Type: Full-time

Interested?

If this opportunity matches your experience in SoC Verification, Testbench Architecture, and DV Technical Leadership, please share your profile at [email protected] or reach out to me directly on LinkedIn.

📌 Principal Design Verification Lead (Bengaluru)
🏢 leadIC Design
📍 Bengaluru