ARF Design Pvt Ltd hiring talented ?????? ???????????? ???????? to join our team

??????????: 3–8 Years
????????: Bangalore / Hyderabad / Bhubaneswar / Ranchi
??????????: Full time

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We are looking for Design Verification (DV) Engineers with 3–8 years of experience in IP and SoC verification. The candidate will be responsible for developing verification environments, testbenches, test plans, and verification methodologies for complex semiconductor IPs and chips.

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?Develop and maintain SystemVerilog/UVM-based verification environments.
?Create verification plans, test scenarios, test cases and functional coverage.
?Develop UVM testbenches, sequences, drivers, monitors, scoreboards and functional coverage.
?Perform block/IP-level and subsystem/SoC-level verification.
?Debug RTL, simulation failures and functional issues using waveform/debug tools.
?Develop and maintain SVA assertions and perform assertion-based verification.
?Work with RTL designers to identify, analyze and resolve design issues.
?Perform regression testing,



coverage analysis and improve verification quality.
?Work with industry-standard simulators and verification/debug tools.
?Contribute to verification methodology improvements and automation.

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?Strong knowledge of Digital Design and RTL concepts .
?Hands-on experience with SystemVerilog and UVM.
?Good understanding of Verilog/SystemVerilog assertions (SVA).
?Experience with functional and code coverage.
?Good understanding of AMBA protocols – AXI/AHB/APB, preferably.
?Experience in IP/SoC-level verification.
?Strong debugging and problem-solving skills.
?Experience with simulators such as VCS, Xcelium or Questa.
?Scripting knowledge in Python/Perl/Tcl/Shell is an advantage.
?Familiarity with Linux/Unix environments and Git

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Experience in verification of one or more of the following is highly desirable:
PCIe | USB | DDR/LPDDR | Ethernet | MIPI | SerDes | CXL | UCIe | NoC | Memor

📌 Design Verification Engineer (Bengaluru)
🏢 ARF Design
📍 Bengaluru