15 Aug
|
Weekday AI
|
Bengaluru
15 Aug
Weekday AI
Bengaluru
This role is for one of the Weekday's clients
Salary range: Rs 1500000 - Rs 8000000 (ie INR 15 - 80 LPA)
Min Experience: 5+ years
Location: Bengaluru, Telangana, Hyderabad, Telangana, India, Karnataka
JobType: full-time
We are seeking an experienced DFT Engineer with 5–20 years of industry experience to drive the design-for-test strategy and implementation for complex ASIC/SoC designs. The ideal candidate will have solid hands-on expertise in ATPG and Scan, with a solid understanding of test architecture, fault coverage, test pattern generation, and DFT verification.
You will work closely with RTL, Physical Design, Verification, and Product Engineering teams to develop robust, production-ready test solutions while ensuring high test coverage, quality, and manufacturability.
Key Responsibilities
Define and implement DFT architectures for complex ASIC/SoC designs.
Develop and integrate Scan-based DFT structures across blocks and top-level designs.
Develop, run, and debug ATPG flows for stuck-at, transition, and other relevant fault models.
Analyze ATPG coverage, fault reports,
pattern quality, and test compression results.
Debug ATPG failures and identify design, constraint, or test-logic issues.
Work with RTL and design teams to resolve DFT-related implementation and verification issues.
Perform DFT rule checks and ensure test structures meet project requirements.
Support scan insertion, scan-chain verification, chain balancing, and scan connectivity checks.
Collaborate with physical design teams to ensure DFT structures are physically implementable and timing-aware.
Support DFT verification from block level through full-chip integration.
Develop and maintain DFT methodologies, scripts, and automation to improve design and test efficiency.
Participate in test architecture reviews and contribute to improving test coverage, quality, and overall silicon readiness.
Support post-silicon debug and analysis of test-related issues when required.
Must-Have Skills
5–20 years
📌 Design-for-Test (DFT) Engineer (Bengaluru)
🏢 Weekday AI
📍 Bengaluru