Responsibilities MaxLinear is seeking an ASIC Design Manager to join our Digital ASIC Design group Our team develops innovative ASIC solutions across domains such as wired and wireless communications storage and networking In this leadership role you will manage mentor and guide a high-performance team responsible for architecting and designing advanced digital components including signal processing modules network processors hardware accelerators and interface controllers In this role you will focus on Lead and mentor a team of digital ASIC designers across multiple projects and domains Drive architecture and micro-architecture definition for complex digital blocks Oversee RTL design and conduct design reviews to ensure high-quality deliverables Collaborate with cross-functional teams including verification implementation physical design software and systems Translate system-level requirements into optimized ASIC implementations that meet performance power and area PPA goals Establish and improve design processes to enhance quality and execution efficiency Manage project schedules risks and resource allocation Foster a culture of innovation ownership and continuous learning Qualifications BE M Tech in Electronics Engineering 12 years of experience in Digital ASIC design with at least 2 years in managerial or leadership role Strong fundamentals in digital logic design CMOS technology and ASIC design methodology Proven expertise in ASIC architecture and micro-architecture RTL design Verilog VHDL Synthesis and Static Timing Analysis STA Solid understanding of CPU architecture SoC systems and programming fundamentals Demonstrated ability to convert engineering requirements into robust ASIC solutions meeting PPA targets Experience in project and people management including performance development and team building Well versed in industry-standard design and verification methodologies Robust analytical and problem-solving skills Excellent written and verbal communication