Company:Qualcomm India Private Limited

Job Area:Engineering Group, Engineering Group > Hardware Engineering

General Summary:
Job Description - 5+ year RTL designer _

Key Responsibilities
Develop detailed micro-architecture specifications from high-level architectural requirements.
Design and implement synthesizable RTL using Verilog/SystemVerilog.
Participate in design reviews and ensure design quality and compliance with coding guidelines.
Perform RTL quality checks including:
Lint analysis and cleanup - CDC/RDC analysis and closure
FSM and structural checks
Develop and maintain design documentation including micro-architecture and interface specifications.
Work closely with verification teams to define verification plans and resolve functional issues.
Support synthesis, timing analysis, and timing closure activities.
Develop and review SDC constraints for block-level and subsystem-level designs.
Analyze and debug issues across simulation, synthesis, and implementation stages.




Collaborate with DFT and physical design teams for successful integration and tapeout.

Minimum Qualifications:
Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

Required Qualifications
Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Engineering, or related field.
5+ years of experience in ASIC/SoC front-end design.
Solid knowledge of digital design fundamentals.
Hands-on expertise in:
_RTL design using Verilog/SystemVer

📌 Rtl Design Engineer, Sr Lead Bengaluru
🏢 Qualcomm
📍 Bengaluru