We are part of a excellent team within NXP that delivers the industry’s first tri-radio chip. Please visit our recent announcement: NXP Advances IoT Connectivity with Industry’s First Secure Tri-Radio Device | NXP Semiconductors
We have a senior level ASIC design engineer opening. Will you be interested in working on cutting-edge wireless technology that will be the backbone of future connected lifestyle? Do you like to work with a group of passionate and talented engineers to tackle the most crucial tasks leading to the next-generation of innovations? Are you ready for a career move that could make a bigger impact to the team’s success?

Our team focuses on wireless MAC controllers and system level development for wireless products, with a heavy focus on design and verification to accommodate new customer requested features and current standard specification feature developments. This is a great opportunity to work on wireless related product development with the best-in-class performance, area and lower power.

Your Responsibilities:




Working in full ASIC design cycle ranging from micro architecture design, RTL coding, verification, synthesis, FPGA prototyping, and silicon bring-up.
IP/SoC verification in C/C++, System Verilog, and UVM setting.
Support of IP delivery, FPGA prototyping and silicon validation.
Solving complex design and verification problems with your innovative ideas.

Your Profile Preferred:
MSEE with 3+ years of experience with working knowledge in Bluetooth, IEEE 802.15.4, wireless or other networking controller design and implementation.
Micro-architecture, Verilog RTL coding, and IP/SoC verification.
Familiar with ASIC design concept and design flow: HW/SW co-simulation, synthesis, Lint/CDC, and formal verification.
Fluent in C/C++, System Verilog, and UVM.
Familiar with SVA assertion and coverage driven verification.
Familiar with Perl, Python, shell script, and Tcl.
Small area and low power design experience.
SOC integrati

📌 Senior Asic Design Engineer Pune
🏢 NXP Semiconductors
📍 Pune