Define, design and verify ASIC and ASIC subsystems to be deployed in a range of Cisco platforms. Contribute to a multi-disciplined engineering team to meet the power, performance, and area goals for products. Design, document, and develop ASIC subsystems for release in high volume and quality. Help define the process, methods, and tools for design and implementation of complex developments. What You’ll Do:
Drives the definition, architecture and design of high performance ASICs
Owns complex or multiple functional areas
Develops reusable code for future projects
Creates re-usable code
Debugs at ASIC, SW, HW level
Works with ASIC and Apps, with limited external scope
Leads design work by solving block level issues and participates in chip level issue resolution
Drives reviews and recognizes areas of architectural concerns
Defines recent verification methodologies
Helps in lab bring up
Leads code reviews at platform level
Defines methodologies of execution for analog/mixed signal products
Collaborates with the mixed-signal team and system teams to help define and specify the requirements
Responsible for testing high accuracy analog designs, and helping to suppo
Develops and deploys PD EDA flows
Owns physical design of highly complex blocks
Identifies, designs and implements power and signaling solutions Minimum Qualifications: Typically: Bachelors + 7 years of related experience, or Masters + 4 years of related experience, or PhD + 1 year of related experience Preferred Qualifications Varies based on the team and business needs | Preferred Qualifications are desired education, experience, and skills that are in addition to Minimum Qualifications
Why Cisco?
At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These