The Role

Behavioral models are the silent backbone of every FPGA design flow. When they're accurate, engineers move quick. When they're not, everything downstream pays the price.

At Lattice, we're looking for a Sr Staff Engineer who takes that responsibility seriously — someone who can lead the technical development of analog, digital, and mixed-signal models for our FPGA product portfolio, while working closely with the design and verification teams who depend on them.

This is a hands-on leadership role. You'll be building and validating models, mentoring engineers, and driving quality across one of the most technically nuanced disciplines in FPGA development.

What You'll Do
Lead the design, development, and validation of behavioral models for analog, digital, and mixed-signal circuits in Lattice FPGAs
Use simulation tools — Verilog, VHDL, SystemVerilog, SPICE, or equivalent — to perform circuit analysis and validate model accuracy
Collaborate closely with design engineers to understand circuit requirements and translate them into accurate, high-performance models




Partner with internal consumers of models (verification, implementation, characterization teams) to ensure their needs are met and objectives are achieved
Analyze simulation results, identify gaps, and provide actionable feedback to improve circuit designs and model fidelity
Optimize models for performance, accuracy, and simulation efficiency
Provide technical leadership and mentorship to a team of circuit modeling engineers
Document modeling methodologies, assumptions, and results for internal and external stakeholders
Stay current with advances in circuit modeling techniques, tools, and methodologies

What You Bring
BS/MS in Electrical Engineering or related field
12+ years of overall experience with solid depth in circuit modeling and simulation (Sr Staff level)
Proven hands-on experience in analog, digital, or mixed-signal behavioral modeling
Proficiency in circuit simula

📌 Sr Staff Pune
🏢 Lattice Semiconductor
📍 Pune