Job Description
- Define formal verification strategy and signoff methodology for SoCs
- Own SoC-level LEC signoff from RTL to final netlist
- Resolve complex, late-stage equivalence failures across hierarchies and power domains
- Drive best practices, reusable FV flows, and signoff checklists
- Mentor formal verification engineers and review signoff quality
- Interface with customers, internal signoff teams, and EDA vendors