Design Verification(VLSI domain)apgemini (Hyderabad)

Design Verification(VLSI domain)apgemini (Hyderabad)

16 Aug
|
Coders Brain Technology
|
Hyderabad

16 Aug

Coders Brain Technology

Hyderabad

Location:bangalore/Hyderabad/Noida

Job Description

· You will be part of the team verifying IPs and SoCs leading to first Si success.
· IP verification is coverage driven using latest industry standard methodologies and HVLs.
· Work involves defining verification strategy, writing test plans, developing effective test benches and test cases.
· Code coverage, Functional coverage and assertions are desired.
· ARM based SoC verification experience is an added advantage.
· Proficiency in one scripting language like Perl, C++, Python, Unix Make, Unix Shell Scripts etc. is a great plus.
· Multiple positions with emphasis on AMS and Power aware verification.
· Should have worked on GLS.
Experience-4+ years

Primary Skills

· Verilog, SV, UVM/OVM, IP Verification, SoC Verification, scripting – Perl, Python, Shell, and Tcl.

Secondary Skills

· Test bench / model / VIP development, Functional coverage, GLS, LEC, Emulation, AMS, ARM, Protocols AHB/AXI/APB, Ethernet, USB, PCIe, I2C, SPI, CAN, Mipi CSI/DSI, LPDDR.

📌 Design Verification(VLSI domain)apgemini (Hyderabad)
🏢 Coders Brain Technology
📍 Hyderabad

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