Memory (ASIC) Design Engineer (Surat)

Memory (ASIC) Design Engineer (Surat)

16 Aug
|
Vicharak
|
Surat

16 Aug

Vicharak

Surat

Employment Type:
Full time

Experience:
3–10+ years

About Vicharak

Vicharak is an Indian semiconductor and computing company designing high-performance computing platforms, FPGA-based products, single-board computers, and next-generation edge AI processors.

We are developing a high-performance, energy-efficient edge AI accelerator focused on transformer and large-language-model workloads. Our work includes custom memory architectures, compute-in-memory, advanced data formats, high-bandwidth memory subsystems, and ASIC implementation on advanced semiconductor nodes.

Role Overview

We are looking for a
Memory Design Engineer
to work on custom SRAM, MRAM, register-file, and compute-in-memory macros for our next-generation AI accelerator.

The engineer will be responsible for memory-cell evaluation, array architecture, peripheral circuit design, characterization, verification, and integration of custom memory macros into the SoC.

The role requires a strong understanding of transistor-level circuit design, memory architecture, process variation, timing, power, reliability,



and physical-design constraints.

Responsibilities
- Design and optimize custom SRAM, register-file, and embedded-memory macros.
- Develop memory-array architectures, including bit-cell selection, banking, segmentation, redundancy, and power-domain organization.
- Design peripheral circuits such as:
- Sense amplifiers
- Write drivers
- Precharge circuits
- Row and column decoders
- Word-line drivers
- Level shifters
- Reference-generation circuits
- Read and write assist circuits
- Evaluate SRAM,gain-cell, and other emerging-memory technologies.
- Design memory structures suitable for digital and mixed-signal compute-in-memory architectures.
- Optimize memory macros for:
- Read and write latency
- Dynamic and leakage power
- Area and density
- Read stability
- Write margin
- Retention
- Endurance
- Perform transistor-level simulations using SPICE-based tools.
- Run PVT, Monte Carlo, mismatch, agin

📌 Memory (ASIC) Design Engineer (Surat)
🏢 Vicharak
📍 Surat

Reply to this offer

Impress this employer describing Your skills and abilities, fill out the form below and leave Your personal touch in the presentation letter.

Subscribe to this job alert:

Get the latest job offers by email for: memory (asic) design engineer (surat) / surat