ASIC Design Engineer
This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office.
Who We Are:
Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.
Job Description:
What You'll Do
- Define and architect high-performance hardware blocks for next-generation networking ASICs.
- Perform micro-architecture development and RTL design to achieve maximum performance, throughput, and power efficiency.
- Develop and implement Verilog RTL code for complex ASIC designs.
- Collaborate with the verification team to create comprehensive verification test plans and support debugging of test failures.
- Work closely with physical design engineers to develop timing constraints and ensure successful implementation.
- Analyze and resolve timing violations and perform timing closure activities.
- Contribute to the design of networking ASICs supporting advanced protocols and high-speed data processing.
- Participate in design reviews, debugging, and optimization activities throughout the ASIC development lifecycle.
What You Need to Bring
- Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related field (BSEE/MSEE).
- 3+ years of experience in ASIC design and RTL development.
- Solid expertise in Verilog RTL coding and digital logic design.
- Solid understanding of micro-ar