- An expert level experience with UFS/Unipro/MPHY IP/sub-systems.
- Highly experienced with defining block, sub-system and SOC top level test plans.
- An expert level with developing UVM-based SV test-benches.
- Deep understanding and knowledge of verification methodologies flows and quality metrics.
- Great debugging and problem-solving skills.
- Team player with great interpersonal communication skills.
Job Qualifications
- At least 5 years of relevant experience in UFS/Unipro/MPHY verification.
- Solid and relevant expertise with ASIC simulation tools and advanced verification methods.
- Expert level in verification languages such as UVM and System Verilog.
- Relevant experience with writing block-level and SoC test-plans.
- Education: bachelors or master's degree in electronic engineering or equivalent.