• Emulation experience on any/all available platforms (Palladium, Protium, Veloce, or Zebu, EP) including design bringup, build flow, debug, performance and throughput tuning.
- Experience with Verilog, VHDL design Knowledge
- Experience with C/C++, DPI and System Verilog add on.
- Experience writing scripts using any languages (Perl, Python, Makefile )
- Experience with waveform debug tools, Verdi/SimVision.
- Knowledge of communication/Interface protocols, like (PCIE, USB ), DDR, SPI
- Solid communication skills and ability to work as a team
Bachelor's degree and a minimum of 5 years relevant industry experience.