Responsibilities

We are seeking a Principal ASIC Design Verification Engineer to provide technical leadership and strategic direction across IP, Subsystem, and SoC verification. This role is ideal for a verification architect and technical authority who drives methodology innovation, mentors teams, and champions AI-assisted verification to scale quality and productivity across complex ASIC platforms. You will focus on the following:
- Act as a verification technical leader and architect across IP, Subsystem, and SoC programs
- Define and own end-to-end verification strategies, methodologies, and best practices across teams
- Architect highly reusable, scalable, and modular UVM-based verification environments
- Drive cross-project alignment on verification flows, coverage strategies, and sign-off criteria
- Lead complex debug efforts, root-cause analysis, and final functional sign-off for critical programs
- Champion AI-driven, data-driven, and automation-enabled verification solutions to eliminate bottlenecks
- Establish advanced regression, coverage analytics,



and intelligent failure triage workflows
- Mentor senior and junior verification engineers; raise the overall technical bar of the organization
- Partner closely with architecture, design, validation, and product teams to influence design-for-verification decisions
- Act as a key technical interface with internal leadership and external stakeholders

Qualifications
- Bachelor’s or Master’s degree in Electronic Engineering or a related field
- 12–16 years of deep, hands-on ASIC Design Verification experience
- Demonstrated leadership in IP, Subsystem, and SoC-level verification, preferably in networking or packet-processing domains
- Proven experience architecting complex verification environments used across multiple programs
- Expert-level skills in:
- SystemVerilog, UVM, Verilog
- C/C++
- Robust mastery of verification methodologies, including constrained-random, coverage-driven verification, and gate-leve

📌 Principal ASIC Design Verification Engineer (Bengaluru)
🏢 MaxLinear
📍 Bengaluru