Engineering Lead for Modem Design and Implementation

Location: Bangalore

Exp – 4 to 10 yrs

Years of Experience:- B.E in ECE with industrial experience of 8+ years or

M.E in VLSI/Signal processing/Electronics with minimum 6 years of industrial experience

Must have skills:-

1. VLSI, RTL, Verilog/System Verilog

2. Good fundamentals of communication theory

3. Good understanding of DSP for use in communication systems.

4. Worked on modules like Automatic Gain Control (AGC) / Automatic Frequency correction (AFC) / Equalizer (either time domain or frequency domain) / Forward Error Correction schemes like Reed-Solomon Codes / Convolutional Encoding / Viterbi Decoding or any other similar modules

5. Should have worked on actual systems in the lab to prove the system performance of the modem.

6. Good RTL skills to write optimal code considering both power and area.

7. Exposure to simulation tools like Matlab / Scilab and ability to translate Scilab / Matlab code to RTL

- Exposure to fixed point coding
- Should have worked on FPGA prototype systems
- Good written and oral communication skills needed

Valuable to have skills

1. Having worked on 2.4GHz systems like WLAN, Bluetooth. 2. Exposure to Bluetooth Low Energy (BLE) is a big plus.

3.



Exposure to analog and RF concepts / modules like LNA, Mixer, VGA.

4. Worked on communication systems and DSP having developed modem (modulator demodulator) design and implementation for wired or wireless systems.

- Exposure to customer interaction.

Responsibilities

1. Understand existing IP design and Bluetooth15.4 specifications 2. Digital design, Micro architecture and RTL coding in Verilog of modems supporting multiple technologies including Classic Bluetooth, Bluetooth Low energy and IEEE 802.15.4

3. Digital-design, micro-architecture, ASIC Frontend Tools runs like Linting, Logic equivalence, Synthesis, CDC checks,

4. Support customers with integration of modem with custom or 3rd party RF, Manage IP delivery to SOC teams. Work with customer ASIC design teams on timing closure and power optimization.

Domain:- VLSI design

Key words:-

Modem, modulation, demodulation, DSP, Matlab, Scilab, RTL

Requirements

Note: Must have VLSI, RTL, Verilog/System Verilog

Should have work experience on FPGA prototype systems

Key words

Modem, modulation, demodulation, DSP, Matlab, Scilab, RTL

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📌 Engineering Lead for Modem Design and Implementation (Bengaluru)
🏢 Talpro INdia
📍 Bengaluru