Our vision is to transform how the world uses information to enrich life for all.
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
In this challenging role you will be engaged block level and sub-system level design and timing optimization and supervising their layout.
You will be also partnering with the Logic Team to explain and support the array functionality.
You will collaborate with project teams to define full-chip floorplan and how to fit and place core circuits in fullchip level.
You will be also working with Technology develop to finalize array waveforms.
I In addition to design activities you will be heavily engaged circuit optimization from base cells all the way to full-chip level using wide variety of simulation tools such as HSPICE, Fast SPICE and ncverilog.
I In addition to design activities you will mentor junior Design to grow-up.
Last but not least you are responsible for documenting block level and sub-system level Micro-Architecture Spec(MAS) in accordance with variety of industry standards such as ISO26262.
A deep understanding and knowledge of digital, analog and mixes signal circuit design, CMOS device physics, Flash cell array functionality.
Requirements:
- MS/PhD + 2 to 6 years or BS + 6 to 10 years of experience in semiconductor industry.
- Deep knowledge and understanding of digital, analog and mixed signal circuits.
- Deep knowledge of CMOS device physics.
Deep knowledge of FLASH array and reliability mechanism.
Deep Knowledge of analog and digital simulation tools such as HSPICE, Fast SPICE and ncVerilog
- Solid verbal communication skills (English)
- Interested and motivated to work as an engineer on sophisticated systems-level products
- Ability to establish and maintain good relationships with colleagues
- Individual must have proven ability to achieve r