ASIC Verification Engineer
This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office.
Who We Are:
Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know wide-ranging backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE.
Job Description:
What You'll Do
Develop and maintain ASIC verification environments using SystemVerilog and UVM methodologies.
Architect and implement block-level, subsystem-level, and full-chip verification environments.
Create, execute,
and deliver comprehensive verification test suites for ASIC designs.
Perform functional verification using industry-standard simulators such as VCS and NC/Xcelium.
Verify complex ASIC blocks independently and drive them to tape-out signoff.
Analyze and close code coverage, functional coverage, and support gate-level simulations (GLS).
Debug and resolve design issues by collaborating closely with RTL designers and software/firmware teams.
Enhance verification productivity by developing Perl, Python, Tcl, or Shell scripts for automation and infrastructure improvements.
Contribute to the adoption and application of advanced verification methodologies, including constrained-random verification and UVM-based verification flows.
What You Need to Bring
Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or a related field (BSEE/MSEE).
3+ years of experience in ASIC/SoC verification.
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