Job Title: NT STA Engineer (AMS/Macro Timing) - 3-5 Yrs

Location: Hyderabad

No. Of positions: 1

Experience required: 3-5 Years

- Drive timing closure at the sub-block level to enable internal timing harness generation.
- Perform Static Timing Analysis (STA) for AMS/IP macros and support resolution of timing-related design issues.
- Develop and maintain timing models for AMS macros in multiple formats.
- Analyze timing paths, topology, constraints, and generate comprehensive timing reports.
- Collaborate with design and characterization teams to achieve timing signoff goals.
- Drive methodology and flow improvements through automation and scripting.

Job Deliverables

- Timing models for AMS macros in required formats.
- Timing path, topology, and signoff analysis reports.
- Timing closure support and design fix recommendations.
- Automation solutions to improve STA productivity and flow efficiency.

Desired Qualification

- Masters or equivalent





Desired Experience

- Hands-on experience in NT STA and Liberty (.lib) characterization of AMS/IP macros.
- Solid understanding of STA concepts and timing fundamentals.
- Experience with HSPICE/Spectre simulation environments is a plus.
- Proficiency in automation and scripting using Shell, Perl, Tcl, and/or Python.
- Strong analytical, debugging, and problem-solving skills.
- Excellent communication, collaboration, and documentation skills.
- Organized, methodical, and detail-oriented approach to work.

Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

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