Skill Requirements
Solid proficiency in STD-Cell circuit design, including transistor-level schematic capture and layout using industry EDA tools.
In-depth knowledge of analog and digital simulation, characterization techniques, and design optimization.
Solid understanding of process compliance and tracking using design management tools.
Solid analytical skills for technical feasibility evaluation and risk identification.
Other Requirements
Optional but valuable: Cadence Certified Custom IC Design Engineer, Synopsys Custom Design Certification.
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