Overview

Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional PE Logic Design to join our MIC Design IDC team in Bangalore. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.

Rambus offers a adaptable work workplace, embracing a hybrid approach for the majority of our office-based roles. We encourage employees to spend an average of at least three days per week working onsite, allowing for two days of remote work.

Responsibilities
Understand the spec requirements and convert into a micro architecture specification.
Realize the RTL design using Verilog/System Verilog.
Works with verification teams in defining the test plan and reviews the test coverage.
Does pre implementation design checks like lint, CDC, RDC, constraint validation.
Works with physical design team in defining the design and timing constraints and driving implementation till timing closure.
Interact with cross functional circuit teams for current product development




Participate in Architecture level discussions to define the specifications.
Post silicon validation support in bringing up parts.

Qualifications
Minimum 8 years of solid ASIC logic/Digital design expertise with bachelor’s degree or master’s degree
Strong digital design fundamentals.
Strong hands on expertise in HDLs like Verilog/System Verilog.
Experience with EDA tools for simulation, synthesis, and timing analysis and logic equivalence check.
Knowledge of High speed protocols is plus.
Strong scripting abilities using Perl/Tcl/python is a plus
Strong written and verbal communication skills. Able to break down technical concepts to a larger audience is desired.

About Rambus
Rambus is a global company that makes industry-leading memory interface chips and Silicon IP to advance data center connectivity and solve the bottleneck between memory and processing. With over 30 years of semiconductor e

📌 Pe Logic Design Bengaluru (India)
🏢 Rambus
📍 India